Characterization of MOS Transistor Current Mismatch
Electron device matching has been a key factor on the performance of today’s analog or even digital electronic circuits. This paper presents a study of drain current matching in MOS transistors. CMOS test structures were designed and fabricated as a way to develop an extensive experimental work, whe...
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| Format: | article |
| Sprache: | Englisch |
| Veröffentlicht: |
2004
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| Online-Zugang: | https://hdl.handle.net/20.500.12008/21287 |
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| Zusammenfassung: | Electron device matching has been a key factor on the performance of today’s analog or even digital electronic circuits. This paper presents a study of drain current matching in MOS transistors. CMOS test structures were designed and fabricated as a way to develop an extensive experimental work, where current mismatch was measured under a wide range of bias conditions. A model for MOS transistor mismatch was also developed, using the carrier number fluctuation theory to account for the effects of local doping fluctuations. This model shows a good fitting with measurements over a wide range of operation conditions, from weak to strong inversion, from linear to saturation region, and allows the assessment of mismatch from process and geometric parameters. |
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