A compact functional verification flow for a RISC-V 321 based core
The structure of a functional verification flow used for the design of a RISC-V core is presented. The paper offers a guide on the test-planning used and details of the flow architecture, showing how to integrate the Universal Verification Methodology with the required, reference models, while imple...
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| Other Authors: | , , , , |
| Format: | article |
| Language: | English |
| Published: |
2020
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| Subjects: | |
| Online Access: | https://hdl.handle.net/10895/1549 |
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