CMOS level shifters from 0 to 18 V output
A design methodology for level shifters voltage translators, where the output voltage ranges from 0 to 18 V, and the input voltage ranges from 2 to 5.5 V in a 0.6 lm CMOS-HV technology, is presented. This family of circuits have a special interest in the case of implantable medical devices where is...
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| Other Authors: | , |
| Format: | article |
| Language: | English |
| Published: |
2021
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| Subjects: | |
| Online Access: | https://hdl.handle.net/10895/1553 |
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