Fully-Depleted SOI CMOS Technology for Low-Voltage Low-Power Mixed Digital/Analog/Microwave Circuits

This paper demonstrates that fully-depleted (FD) silicon-on-insulator (SOI) technology offers unique opportunities in the field of low-voltage, low-power CMOS circuits. Beside the well-known reduction of parasitic capacitances due to dielectric isolation, FD SOI MOSFETs indeed exhibit near-ideal bod...

Full description

Bibliographic Details

Main Author:	Flandre, Denis (author)
Other Authors:	Colinge, J. P (author), Chen, J (author), De Ceuster, D (author), Eggermont, J. P (author), Ferreira, L (author), Gentinne, B (author), Jespers, Paul (author), Viviani, A (author), Gillon, R (author), Raskin, J. P (author), Vander Vorst, A (author), Valiente, Gabriel (author), Silveira, Fernando (author)
Format:	article
Language:	English
Published:	1999
Subjects:	ELECTRÓNICA
Online Access:	https://hdl.handle.net/20.500.12008/20774
Tags:	Add Tag No Tags, Be the first to tag this record!