A 2V rail-to-rail micropower CMOS comparator

The design of a rail-to-rail micropower comparator in CMOS technology is described. The circuit is intended for implantable biomedical devices powered by batteries, with a total consumption of 500nA and operation up to supply voltages of 2V. This cell, currently being fabricated, has a core die area...

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Huvudupphov: Barú, Marcelo (author)
Övriga upphov: de Oliveira, Oscar (author), Silveira, Fernando (author)
Materialtyp: article
Språk:engelska
Utgiven: 1996
Ämnen:
Länkar:https://hdl.handle.net/20.500.12008/20708
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author Barú, Marcelo
author2 de Oliveira, Oscar
Silveira, Fernando
author2_role author
author
author_browse Barú, Marcelo
Silveira, Fernando
de Oliveira, Oscar
author_facet Barú, Marcelo
de Oliveira, Oscar
Silveira, Fernando
author_role author
collection COLIBRI
dc.creator.none.fl_str_mv Barú, Marcelo
de Oliveira, Oscar
Silveira, Fernando
dc.date.none.fl_str_mv 1996
2019-05-29T15:27:54Z
2019-05-29T15:27:54Z
20190528
dc.identifier.none.fl_str_mv Barú, Marcelo, de Oliveira, Oscar, Silveira, Fernando. A 2V rail-to-rail micropower CMOS comparator [en línea] Montevideo : UR. FING, 1996.
https://hdl.handle.net/20.500.12008/20708
dc.language.none.fl_str_mv en
eng
dc.publisher.none.fl_str_mv UR. FING
dc.rights.none.fl_str_mv info:eu-repo/semantics/openAccess
Licencia Creative Commons Atribución – No Comercial – Sin Derivadas (CC - By-NC-ND)
dc.source.none.fl_str_mv reponame:COLIBRI
instname:Universidad de la República
instacron:Universidad de la República
dc.subject.none.fl_str_mv ELECTRÓNICA
dc.title.none.fl_str_mv A 2V rail-to-rail micropower CMOS comparator
dc.type.none.fl_str_mv Artículo
info:eu-repo/semantics/article
info:eu-repo/semantics/publishedVersion
description The design of a rail-to-rail micropower comparator in CMOS technology is described. The circuit is intended for implantable biomedical devices powered by batteries, with a total consumption of 500nA and operation up to supply voltages of 2V. This cell, currently being fabricated, has a core die area of 0.27 mm2 on a 2.4;m standard analog CMOS technology with a 0.85V nominal threshold voltage. It is expected to have a typical response time of 35ms ;and an offset voltage of about 6mV. The limitations imposed by the low supply voltage are presented. The ways of overcoming these limitations, based on an accurate sizing of the transistors for operation in the weak and moderate inversion regions are studied. An approach, based on a capacitive D/A converter, for the generation of a comparison reference input that is digitally programmable is also presented.
eu_rights_str_mv openAccess
format article
id anni_e3a45f254a05e8fd92a3d062d7486d48
identifier_str_mv Barú, Marcelo, de Oliveira, Oscar, Silveira, Fernando. A 2V rail-to-rail micropower CMOS comparator [en línea] Montevideo : UR. FING, 1996.
instacron_str Universidad de la República
institution Universidad de la República
instname_str Universidad de la República
language eng
language_invalid_str_mv en
network_acronym_str anni
network_name_str oai-lr-anni
oai_identifier_str oai:colibri.udelar.edu.uy:20.500.12008/20708
publishDate 1996
publishDateSort 1996
publisher.none.fl_str_mv UR. FING
reponame_str COLIBRI
repository.mail.fl_str_mv
repository.name.fl_str_mv
repository_id_str
rights_invalid_str_mv Licencia Creative Commons Atribución – No Comercial – Sin Derivadas (CC - By-NC-ND)
spelling A 2V rail-to-rail micropower CMOS comparatorBarú, Marcelode Oliveira, OscarSilveira, FernandoELECTRÓNICAThe design of a rail-to-rail micropower comparator in CMOS technology is described. The circuit is intended for implantable biomedical devices powered by batteries, with a total consumption of 500nA and operation up to supply voltages of 2V. This cell, currently being fabricated, has a core die area of 0.27 mm2 on a 2.4;m standard analog CMOS technology with a 0.85V nominal threshold voltage. It is expected to have a typical response time of 35ms ;and an offset voltage of about 6mV. The limitations imposed by the low supply voltage are presented. The ways of overcoming these limitations, based on an accurate sizing of the transistors for operation in the weak and moderate inversion regions are studied. An approach, based on a capacitive D/A converter, for the generation of a comparison reference input that is digitally programmable is also presented.UR. FING2019-05-29T15:27:54Z2019-05-29T15:27:54Z199620190528Artículoinfo:eu-repo/semantics/articleinfo:eu-repo/semantics/publishedVersionBarú, Marcelo, de Oliveira, Oscar, Silveira, Fernando. A 2V rail-to-rail micropower CMOS comparator [en línea] Montevideo : UR. FING, 1996.https://hdl.handle.net/20.500.12008/20708reponame:COLIBRIinstname:Universidad de la Repúblicainstacron:Universidad de la RepúblicaenengLas obras depositadas en el Repositorio se rigen por la Ordenanza de los Derechos de la Propiedad Intelectual de la Universidad De La República. (Res. Nº 91 de C.D.C. de 8/III/1994 – D.O. 7/IV/1994) y por la Ordenanza del Repositorio Abierto de la Universidad de la República (Res. Nº 16 de C.D.C. de 07/10/2014)info:eu-repo/semantics/openAccessLicencia Creative Commons Atribución – No Comercial – Sin Derivadas (CC - By-NC-ND)oai:colibri.udelar.edu.uy:20.500.12008/207082026-04-14T10:14:51Z
spellingShingle A 2V rail-to-rail micropower CMOS comparator
Barú, Marcelo
ELECTRÓNICA
status_str publishedVersion
title A 2V rail-to-rail micropower CMOS comparator
title_full A 2V rail-to-rail micropower CMOS comparator
title_fullStr A 2V rail-to-rail micropower CMOS comparator
title_full_unstemmed A 2V rail-to-rail micropower CMOS comparator
title_short A 2V rail-to-rail micropower CMOS comparator
title_sort A 2V rail-to-rail micropower CMOS comparator
topic ELECTRÓNICA
url https://hdl.handle.net/20.500.12008/20708